In order to convert interlaced video signals into progressive video signals, motion adaptive progressive conversion apparatuses have been conventionally employed.
FIG. 14 illustrates an example of an interlaced video signal. An interlaced video signal in one frame is transmitted as a picture in two fields. For example, when L is an even value, signals on even-numbered lines such as the L-th line, the (L+2)-th line, the (L+4)-th line, the (L+6)-th line, and the (L+8)-th line are transmitted in the N-th field. Subsequently, signals on odd-numbered lines such as the (L+1)-th line, the (L+3)-th line, the (L+5)-th line, and the (L+7)-th line are transmitted in the (N+1)-th field. Further, signals on the same even-numbered lines as those in the N-th field are transmitted in the succeeding (N+2)-th field.
The interlaced video signal is thus transmitted in two fields, and a video in one frame is displayed by scanning lines in the two fields.
A signal on a line which is not transmitted in each of the fields is generated from signals on lines preceding and succeeding the field on a time basis or signals in the field (e.g., signals on upper and lower lines). The generated signal and the transmitted signal are synthesized, thereby generating a progressive video signal.
A line actually transmitted in a current field is hereinafter referred to as a current line, and a line generated from a plurality of fields preceding and succeeding the current field on a time basis or lines in the current field is hereinafter referred to as an interpolation line.
FIG. 15 illustrates an example of the configuration of the conventional motion adaptive progressive conversion apparatus. As shown in FIG. 15, the motion adaptive progressive conversion apparatus comprises one-field delay circuits J1 and J2, a motion detection circuit J3, an inter-frame interpolation circuit J4, an intra-field interpolation circuit J5, and a switching circuit J6. An interlaced video signal J0 is delayed by one field by each of the one-field delay circuit J1 and the one-field delay circuit J2.
The motion detection circuit J3 compares corresponding pixels on the same line in a given field and a field which is two fields preceding or succeeding the field on a time basis (hereinafter referred to as “between frames”). The motion detection circuit J3 judges, when the difference between the values of the compared pixels is small, that the pixel is a “still picture”, while judging, when the difference between the values of the compared pixels is large, that the pixel is a “moving picture”.
The inter-frame interpolation circuit J4 generates, from the pixels on the same line between frames, the corresponding pixels. For example, when a pixel X on the (L+4)-th line in the (N+1)-th field is interpolated in FIG. 14, the inter-frame interpolation circuit J4 generates the pixel X by an operation “X=(A+B)/2” (A and B indicate the brightness levels of signals representing pixels), for example, from a pixel A on the (L+4)-th line in the N-th field and a pixel B on the (L+4)-th line in the (N+2)-th field.
The intra-field interpolation circuit J5 generates, from pixels on adjacent lines in the same field, the corresponding pixels. For example, when the pixel X on the (L+4)-th line in the (N+1)-th field is interpolated in FIG. 14, the intra-field interpolation circuit J5 generates the pixel X by an operation “X=(C+D)/2” (C and D indicate the brightness levels of signals representing pixels), for example, from a pixel C on the (L+3)-th line in the (N+1)-th field and a pixel D on the (L+5)-th line in the (N+1)-th field.
The switching circuit J6 selects, when an output of the one-field delay circuit J1 is a signal on a current line, the signal on the current line and outputs the selected signal as a progressive video signal J7. The switching circuit J6 outputs the signal fed from the inter-frame interpolation circuit J4 as the progressive video signal J7 when the motion detection circuit J3 judges that an object pixel is judged to be a “still picture”, while outputting the signal fed from the intra-field interpolation circuit J5 as the progressive video signal J7 when the motion detection circuit J3 judges that an object pixel is a “moving picture”.
In the apparatus having such a configuration, with respect to still pictures in frames between which there is a high correlation, a progressive video signal generated by inter-frame interpolation (interpolation performed from two fields preceding or succeeding a current field on a time basis) is outputted. On the other hand, with respect to moving pictures in frames between which there is a low correlation, a progressive video signal generated by intra-field interpolation is outputted. According to this method, therefore, interpolation processing almost conforming to the motion of a picture should be theoretically possible.
In the method as in the conventional example, however, when a picture having a large luminance difference in the vertical direction moves slowly, accurate judgment cannot be made. Therefore, inter-frame interpolation processing suitable for the still picture and intra-field interpolation processing suitable for the moving picture cannot be satisfactorily performed, so that the picture may, in some cases, be degraded.
An example in such a case is illustrated as follows. FIG. 16 illustrates an original video signal which has not been converted yet into an interlaced video signal. The video signal changes in the degree of brightness (luminance) in a sine wave manner. The vertical axis indicates the luminance, and the horizontal axis indicates the number of a line. The luminance of black is indicated as the minimum value “0”, and the luminance of white is indicated as the maximum value “255”. Numerical values in FIG. 16 respectively indicate sampled values.
The luminance of the original video signal is a value “218” on the L-th line, is the maximum value “255” between the L-th line and the (L+1)-th line, is a value “218” on the (L+1)-th line, is a value “128” between the (L+1)-th line and the (L+2)-th line, is a value “37” on the (L+2)-th line, is the minimum value “0” between the (L+2)-th line and the (L+3)-th line, is a value “37” on the (L+3)-th line, is a value “128” between the (L+3)-th line and the (L+4)-th line, and is a value “218” on the (L+4)-th line. Similarly, the luminance also changes on the (L+5)-th line and the subsequent lines. When this picture is transmitted as an interlaced video signal, it is as illustrated in FIG. 17. That is, the value of a solid circle is transmitted in a given field, and the value of an open circle is transmitted in the succeeding field.
FIG. 18 illustrates a superimposition of video signals obtained by shifting such an interlaced video signal a half line at a time for each field. That is, luminance values “218”, “37”, “218”, and “37” are respectively transmitted as the L-th line, the (L+2)-th line, the (L+4)-th line, and the (L+6)-th line in the f1-th field.
Subsequently, the waveform of the original video signal is moved a half line at a time in the f2-th field. Therefore, luminance values “255”, “0”, “255”, and “0” are respectively transmitted as the (L+1)-th line, the (L+3)-th line, the (L+5)-th line, and the (L+7)-th line. In the following, the luminance values of the video signals are respectively transmitted, as illustrated, in the f3-th field, the f4-th field, the f5-th field, and the f6-th field. The relationship between a line and a sampled value in each field is shown in
TABLE 1Relationship between Line and Sampled Value in Each Fieldf1f2f3f4f5f6(a) Value of Original Video SignalL21812837037128L + 1218255218128370L + 237128218255218128L + 337037128218255L + 421812837037128L + 5218255218128370L + 637128218255218128L + 737037128218255(b) Value of Sampled Video SignalL218—37—37—L + 1—255—128—0L + 237—218—218—L + 3—0—128—255L + 4218—37—37—L + 5—255—128—0L + 637—218—218—L + 7—0—128—255
Table 1 (a) shows the luminance value of an original video signal which has not been sampled yet as an interlaced video signal in each of fields, and Table 1 (b) shows the luminance value of a video signal which has already been sampled as an interlaced video signal. On the side of a receiver which has received the interlaced video signal, a luminance value on a line on which the interlaced video signal is not subjected to interpolation signal processing and transmitted, that is, in a column shown with “minus mark” in Table 1 (b) is found, so that the interlaced video signal is converted into a progressive video signal.
Description is made of operations in a case where such an interlaced video signal is processed by the conventional motion adaptive progressive conversion apparatus shown in FIG. 15. In the conventional motion adaptive progressive conversion apparatus, the motion detection circuit J3 judges whether an object pixel is a “still picture” or a “moving picture” by the difference between the luminance value of an interlaced video signal in a given field and the luminance value of an interlaced video signal in a field which is two fields succeeding or preceding the field on a time basis. The result of the judgment is sent to the switching circuit J6.
The switching circuit J6 outputs the signal fed from the inter-frame interpolation circuit J4 as the progressive video signal J7 if the motion detection circuit J3 judges that the object pixel is a “still picture”, while outputting the signal fed from the intra-field interpolation circuit J5 as the progressive video signal J7 if the motion detection circuit J3 judges that the object pixel is a “moving picture”.
The operations of the motion detection circuit J3 will be first described using Table 2 (a) and Table 2 (b).
TABLE 2Table for Explaining Operation of Motion Detection Circuitf1f2f3f4f5f6(a) Difference in Value between Two FieldsL181—0—L + 1—127—128L + 2181—0—L + 3—128—127L + 4181—0—L + 5—127—128L + 6181—0—L + 7—128—127(b) Results of Judgment by Motion Detection CircuitLMoving—Still—PicturePictureL + 1—Moving—MovingPicturePictureL + 2Moving—Still—PicturePictureL + 3—Moving—MovingPicturePictureL + 4Moving—Still—PicturePictureL + 5—Moving—MovingPicturePictureL + 6Moving—Still—PicturePictureL + 7—Moving—MovingPicturePicture
Table 2 (a) shows the difference between the luminance value of an interlaced video signal in a given field and the luminance value of an interlaced video signal in a field which is two fields succeeding or preceding the field. Values shown in Table 2 (a) are operated by the motion detection circuit J3. For example, the luminance value on the L-th line in the f2-th field is a value “181” which is the difference between the value “218” on the L-th line in the f1-th field and the value “37” on the L-th line in the f3-th field. Similarly, the luminance value on each of the lines in each of the fields is operated.
Table 2 (b) shows the results of judgment by the motion detection circuit J3 whether an object pixel is a “moving picture” or a “still picture” on the basis of the luminance value shown in Table 2 (a). Here, a threshold value of luminance between the moving picture and the still picture is taken as a value “20”. The motion detection circuit J3 judges that the object pixel is a “moving picture” when the luminance value thereof is not less than the threshold value “20”, while judging that the object pixel is a “still picture” when the luminance value thereof is not more than the threshold value “19”.
The operations of the inter-frame interpolation circuit J4 and the intra-field interpolation circuit J5 will be then described.
TABLE 3Output Value of Interpolation Circuitf1f2f3f4f5f6(a) Output Value of Inter-frame Interpolation CircuitL128—37—L + 1—191—64L + 2128—128—L + 3—64—191L + 4128—37—L + 5—191—64L + 6128—218—L + 7—64—191(b) Output Value of Intra-field Interpolation CircuitLL + 1128—128—128—L + 2—128—128—128L + 3128—128—128—L + 4—128—128—128L + 5128—128—128—L + 6—128—128—128L + 7
Table 3 (a) shows the output value of the inter-frame interpolation circuit J4. For example, on the L-th line in the f2-th field, the luminance value of the interlaced video signal is not actually transmitted but is found by interpolation signal processing between frames. Therefore, the luminance value on the L-th line in the f2-th field in the inter-frame interpolation circuit J4 is calculated by averaging the value “218” on the L-th line in the f1-th field and the value “37” on the L-th line in the f3-th field in Table 1 (b), that is, as “(218+37)/2=128”. The other luminance value shown in Table 3 (a) is similarly calculated as an average of the respective luminance values between frames.
On the other hand, Table 3 (b) shows the output value of the intra-field interpolation circuit J5. When the luminance value on the (L+1)-th line in the f1-th field is found by interpolation processing between fields, for example, the luminance value is calculated by averaging the value “218” on the L-th line in the f1-th field and the value “37” on the (L+2)-th line in the same f1-th field in Table 1 (b), that is, as “(218+37)/2=128”. The other luminance value shown in Table 3 (b) is similarly calculated as an average of the respective luminance values on the upper and lower lines in the field.
Description is now made of the operations of the switching circuit J6. A signal fed from the inter-frame interpolation circuit J4, a signal fed from the intra-field interpolation circuit J5, a signal on a current line, and a signal fed from the motion detection circuit J3 are fed to the switching circuit J6.
Table 4 shows the luminance value of the progressive video signal J7 outputted from the switching circuit J6.
TABLE 4Output Value of Switching Circuit and Difference betweenInterpolation Signal and Original Signal(a) Output Value of Switching Circuit on Interpolation Circuit (b) Difference between Interpolation Signal and Original Video Signalf1f2f3f4f5f6LL + 1—90—90L + 2037—L + 3—90—90L + 4037—L + 5—90—90L + 6037—L + 7
Table 4 (a) shows results obtained by switching and outputting an inter-frame interpolation signal and an intra-field interpolation signal depending on the results of the judgment by the motion detection circuit J3 shown in Table 2 (b). The switching circuit J6 outputs the signal generated by the inter-frame interpolation circuit J4 if the motion detection circuit J3 judges that the object pixel is a “still picture”, while outputting the signal generated by the intra-field interpolation circuit J5 if it judges that the object pixel is a “moving picture”.
A hatched column in Table 4 (a) is a portion where the object pixel is judged to be a “moving picture”. A column shown with “minus mark” in Table 4 (a) indicates that the interlaced video signal on the current line is outputted.
Table 4 (b) shows the difference between the luminance value of a signal outputted on an interpolation line and the luminance value of an original video signal which has not been interlaced yet in Table 1 (a). As can be seen from Table 4 (a), in the f3-th field and the f5-th field, the difference in luminance is a value “90”, which is very large. The value “90” is too large, in contrast with a value “255” which is the maximum of the luminance values of the signals. In a progressive video signal obtained by progressive conversion, the large difference in luminance value becomes large noise, and the large noise is recognized as significant degradation in picture quality.
Thus, in the conventional motion adaptive progressive conversion apparatus, the motion detection circuit J3 easily judges that the object pixel is a “moving picture” when a picture slowly moves perpendicularly to the line direction, so that the picture quality thereof is liable to be degraded.